A conventional semiconductor device and a conventional method for fabricating the device will be described with reference to FIGS. 16A through 16D.
FIGS. 16A through 16D are cross-sectional views showing respective process steps of a method for fabricating the conventional semiconductor device.
First, as shown in FIG. 16A, a silicon oxide film 12 is formed on a silicon substrate 11, a polysilicon film 13 is deposited over the silicon oxide film 12, and then dopants such as boron and phosphorus are implanted, thereby defining a p-type semiconductor region 13A and an n-type semiconductor region 13B in the polysilicon film 13. Subsequently, a silicon oxide film 14 is deposited over the polysilicon film 13, and then patterning is performed such that part of the silicon oxide film 14 remains only on a portion where a polysilicon resistor or a capacitor is to be formed. Thereafter, as shown in FIG. 16B, a TiN film 15 and a W film 16 are deposited in this order as a metal film, and then a SiN film 17 is deposited under a reduced pressure. Then, as shown in FIG. 16C, patterning is performed such that a resist 18 remains on portions to be both edges of a polysilicon resistor, a portion to be a gate electrode and a port on to be a capacitor. Thereafter, the SiN film 17 is patterned by dry etching to serve as a hard mask.
Next, as shown in FIG. 16D, the resist 18 is removed, and then dry etching is performed, so that a gate electrode with a normal polymetal gate structure is formed on a portion where the SiN film 17 remains and the silicon oxide film 14 does not remain after the patterning (see right-hand end of FIG. 16D), a polysilicon resistor in which the polysilicon film 13 is located under the silicon oxide film 14 with the silicon oxide film 14 serving as a hard mask is formed on a portion where the SiN film 17 does not remain and the silicon oxide film 14 remains after the patterning (see the middle of FIG. 16D), and a capacitor is formed together with the gate electrode and the polysilicon resistor (see the light-hand end of FIG. 16D). The polysilicon resistor has polymetal gate structures at both ends thereof, and wiring is connected to these ends in a subsequent process step (not shown). With respect to the capacitor, the silicon oxide film 14 is used as a capacitive insulating film by connecting wiring to the metal film.
In this manner, the polysilicon resistor, the capacitor and the gate electrode are formed (up to this process, see Japanese Laid-Open Publication No. 09-82896, for example).
However, we further studied the process for fabricating the polysilicon resistor, the capacitor and the gate electrode to find out the following problems.
FIGS. 17A through 17C are views for explaining problems arising in the process for fabricating the conventional polysilicon resistor, capacitor and gate electrode. FIGS. 17A and 17B are cross-sectional views and FIG. 17C shows an SEM image and an FIB image.
First, as shown in FIG. 17A, a silicon oxide film 22 is formed on a silicon substrate 21, a polysilicon film 23 is deposited over the silicon oxide film 22, and boron ions are implanted using a resist pattern as a mask, thereby defining a p-type semiconductor region 23A in the shape of an island in the polysilicon film 23. Subsequently, a silicon oxide film 24 is deposited on the polysilicon film 23 and is subjected to heat treatment at 750° C. At this time, the p-type semiconductor region 23A is vertically sandwiched between the underlying silicon oxide film 22 and the overlying silicon oxide film 24 and is horizontally surrounded with an undoped semiconductor region 23B. That is to say, considering that an undoped silicon film constituting the undoped semiconductor region 23B is substantially considered as an insulating film, the p-type semiconductor region 23A is completely surrounded with insulating films on all sides vertically and horizontally.
In this case, we found that when a resist 25 is patterned and then the silicon oxide film 24 on the p-type semiconductor region 23A is etched using the resist pattern as a mask, polysilicon in the p-type semiconductor region 23A disappears to form a hole 26, as shown in FIG. 17B. This disappearance of polysilicon is noticeable in a case where an undoped silicon oxide film formed under sub atmospheric conditions is used as the silicon oxide film 24.
As shown in FIG. 17C, according to observation results from the SEM image and the FIB image which show the hole 26 formed due to the disappearance of polysilicon, polysilicon disappears over a distance of several microns, and this disappearance of polysilicon is observed in the p-type semiconductor region 23A or at the boundary between the p-type semiconductor region 23A and the no-doped semiconductor region 23B. The disappearance of polysilicon is observed at a surface density of about 20 (cm−2). The disappearance of polysilicon causes the fault that the gate opens and a short-circuit fault at the gate due to entering of metal into a portion where polysilicon has disappeared. The disappearance of polysilicon also reduces the thickness of the gate oxide film to make the insulating property deteriorate so that reliability is reduced as well as a short-circuit fault between the gate electrode and the silicon substrate 21 occurs.